Note Air 3C

[Renate]

The FCC registration is in for the Note Air 3C.
https://fcc.report/FCC-ID/XR3-AIR3C/
It's using the Lattice FPGA for the fancy update.

I think the strategy of Onyx is to baffle us with product variety.

[ottischwenk]

Originally Posted by Renate

The FCC registration is in for the Note Air 3C.
https://fcc.report/FCC-ID/XR3-AIR3C/
It's using the Lattice FPGA for the fancy update.

2 batteries with 7.24 Wh are a bit small

[Quoth]

An ASIC would be 100 to 1000 times better on battery current than an FPGA. They are either unsure of design (FPGA can be updated by user) or don't expect to sell many. The ASIC is about 1/10th the cost but maybe 2,000x or more the once off setup cost.

FPGAs are used for prototypes and low volume niche products, or products where the functionality needs updated later.

[ottischwenk]

Originally Posted by Quoth

An ASIC would be 100 to 1000 times better on battery current than an FPGA. They are either unsure of design (FPGA can be updated by user) or don't expect to sell many. The ASIC is about 1/10th the cost but maybe 2,000x or more the once off setup cost.

FPGAs are used for prototypes and low volume niche products, or products where the functionality needs updated later.

And now imagine that variable processes are required - what do you do with an ASIC?

[Quoth]

Originally Posted by ottischwenk

And now imagine that variable processes are required - what do you do with an ASIC?

The FPGA design can automatically produce an ASIC that's totally identical functionality, but uses less silicon and very much less power. An end user only needs an FPGA if the function must be changed at power on. That's only the case in two circumstances:
1) The spec is poor and the supplier has to release a Firmware update to fix errors.
2) It's on some specialist DSP/CPU/GPU system where the functionality can be changed. That happens at power on.

No kind of eink or other screen application will require changing the FPGA design while the gadget is running. The alternated design would need the screen and FPGA stopped while the FPGA is reloaded from Flash.
An FPGA doesn't execute a program (unless part of it is a CPU/GPU design and that is faster, lower power and less silicon as an ASIC). The design defines a functionality. There are some fixed physical functions like PLL and multipliers, but most of the circuit's logic is implemented by Look up Tables in internal RAM. The interconnections are also loaded into RAM. An FPGA doesn't do anything that can't be done with a board of ICs or an ASIC. If an onboard GPU or CPU is needed that is far more efficiently done in an ASIC (custom IC).

I have 4 spare FPGA development boards and you can have one for free if you pay the postage/shipping.

An FPGA simply allows easier prototyping and deployment in the field when the production volume is too low for a custom part. The penalty is usually a bigger package (for I/O flexibility and need to load design from Flash at every power on, though some have internal Flash) and massively higher power consumption.

[Renate]

It would also allow them to integrate the memory and avoid a second chip.

I have a little Xilinx board I've done some designs on but haven't really found anything useful to do with it yet.

[Quoth]

Originally Posted by Renate

It would also allow them to integrate the memory and avoid a second chip.

An ASIC version of an FPGA usually doesn't need any Flash memory, as that memory holds the design definition. It also may not need RAM, though that depends on the function (obviously a frame store is RAM), but RAM might use a standard part to save chip area.
Of course if the FPGA design is made part of an SoC there is saving in I/O.
An SoC can even be multiple physical chips in one regular package. The first iPhone used a Samsung ARM SoC with the Flash chip and RAM chip layered in a single regular SMT package. The off-the-shelf SC6400 family. I had the development board of it from Samsung with a 4.3" touch LCD. My Linux guru replaced the stock WinCE with Debian. 2007. It made PCB simpler having no address and data bus to separate Flash and RAM chips.
No Intel cpu can do that as the heat would cause Flash and RAM failure.

[Renate]

Originally Posted by Quoth

An ASIC version of an FPGA usually doesn't need any Flash memory, as that memory holds the design definition.

Right, but I think that they are using one (or more?) frame buffer(s).
The memory is 128 MB (1Gb) SDRAM.
https://www.winbond.com/hq/product/s...rtNo=W631GU6NB
I speculate that this is all an outgrowth of the Mira video handling.

[cellaris]

Originally Posted by Renate

I think the strategy of Onyx is to baffle us with product variety.

The Tab 8 C and Leaf 3 will be unveiled on 20 September.

[Renate]

Originally Posted by cellaris

The Tab 8 C and Leaf 3 will be unveiled on 20 September.

Well, the Poke5 is getting kind of old now.
Why didn't they release a Poke6?

[Quoth]

Originally Posted by Renate

Right, but I think that they are using one (or more?) frame buffer(s).
The memory is 128 MB (1Gb) SDRAM.
https://www.winbond.com/hq/product/s...rtNo=W631GU6NB
I speculate that this is all an outgrowth of the Mira video handling.

That's unlikely to be integrated to an ASIC.

I'm not against an FPGA. I have retail products with FPGA in them, but it's because they are niche (low production volume) and power consumption isn't an issue. Also one is costing about €1300, weighs about 6 kg, takes about 2.5 A @ c.14V when idle and is very much more complex than a PC or eReader, so the fact it uses a massive spec FPGA rather than an ASIC is irrelevant.

It also wouldn't be odd in a high end PCIe graphic card for a niche market. That might take 100x the power of an ereader.

The FPGA suggests that either Onyx is very short of cash or isn't confident about the sales volume, or isn't confident about bugs in the design (you can upgrade the design file for an FPGA the user has, but updating an ASIC means a new set of masks and massive NRE charges and only affects future production, it's a new chip).

[kandwo]

Originally Posted by cellaris

The Tab 8 C and Leaf 3 will be unveiled on 20 September.

I can't tell if you're joking or not. Are they really crazy enough to go Leaf 2 -> Page -> Leaf 3?

Really confusing.

[popej]

Originally Posted by Quoth

I have retail products with FPGA in them

Just have looked at schematic of my old Yamaha AVR and found FPGA there. There would be no OTP FPGA if they didn't have applications.

[ottischwenk]

Originally Posted by Quoth

An ASIC
....
FPGAs are used for prototypes and low volume niche products, or products where the functionality needs updated later.

Or if you don't want that it can be examined, which is little problem with an ASIC

[Quoth]

Originally Posted by ottischwenk

Or if you don't want that it can be examined, which is little problem with an ASIC

Explain?

It's easier to reverse engineer file for FPGA than reverse engineer an ASIC. To reverse engineer an ASIC needs huge resources and specialist electron microscopes. It's also destructive. The FPGA design is just a file in flash memory (or sometimes loaded from a disk file of a driver on Mac/Windows/Linux to a peripheral with an FPGA. At power off there is no configuration in an FPGA.

You can buy your own identical FPGA and use the other maker's file or firmware. An ASIC is simply a custom IC. You need a fab lab to make it and an accurate design. NRE cost is $50,000 to $1M. That's why an ASIC is never used for low volume, unless the cost is irrelevant compared to power saving.

Of course there are a few FPGAs with on board Flash. I've no idea how secure that Flash is. Mostly the design is loaded at power on from external flash or a disk file.