Quote:
Originally Posted by ottischwenk
Or if you don't want that it can be examined, which is little problem with an ASIC
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Explain?
It's easier to reverse engineer file for FPGA than reverse engineer an ASIC. To reverse engineer an ASIC needs huge resources and specialist electron microscopes. It's also destructive. The FPGA design is just a file in flash memory (or sometimes loaded from a disk file of a driver on Mac/Windows/Linux to a peripheral with an FPGA. At power off there is no configuration in an FPGA.
You can buy your own identical FPGA and use the other maker's file or firmware. An ASIC is simply a custom IC. You need a fab lab to make it and an accurate design. NRE cost is $50,000 to $1M. That's why an ASIC is never used for low volume, unless the cost is irrelevant compared to power saving.
Of course there are a few FPGAs with on board Flash. I've no idea how secure that Flash is. Mostly the design is loaded at power on from external flash or a disk file.