Quote:
Originally Posted by NiLuJe
They do have a slightly funky, possibly slightly custom storage controller thingy (look for falcon in the kernel sources).
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Quote:
Originally Posted by ilovejedd
Alas, (2-bit) MLC NAND brought P/E cycles down to 10,000 then 5,000 then 3,000.
Planar TLC (3-bit) was down to 500-1,000 until they were able to mitigate with 3D TLC going back up to 3,000.
Unfortunately, QLC (4-bit) further reduces P/E cycles (I think it's back down to 1,000).
I doubt deep sleep works same as hibernate on PCs where RAM is offloaded to flash. The flash used in Kindles just isn't fast enough for that. They're likely using TLC at best. No way they're using expensive 2GB SLC just for cache when storage on the base Kindles is just 4-8GB.
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Weren't you the first to hypothesize hibernation as the deep sleep mechanism? If not hibernate, then what?
In any case, the write doesn't need to be fast since no one is looking. Also, they probably have figured out how to minimize the amount of RAM that needs to be saved. As a guess, they could close any open document before save and reopen it as part of waking up.
The slightly funky, possibly slightly custom storage controller thingy NiLuJe mentions sounds intriguing.