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Old 05-30-2016, 04:35 PM   #16
geekmaster
Carpe diem, c'est la vie.
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Posts: 6,433
Karma: 10773670
Join Date: Nov 2011
Location: Multiverse 6627A
Device: K1 to PW3
I would be tempted to wire some of those "GPIO" lines on your adapter board to the PW3 "USB BOOT", "ON/OFF", and "RESET" switch pads. You know, "for science"...

EDIT: I thought that "JTAG" testpoint near the "SERIAL DEBUG" pins looked interesting, but it made me wonder where all the "other" JTAG pins must be hidden. But then I just now discovered this:
Quote:

Reduced pin count JTAG uses only two wires, a clock wire and a data wire. This is defined as part of the IEEE 1149.7 standard. The connector pins are
  1. TMSC (Test Serial Data)
  2. TCK (Test Clock)
The two wire interface reduced pressure on the number of pins, and devices can be connected in a star topology. [8] The star topology enables some parts of the system to be powered down, while others can still be accessed over JTAG; a daisy chain requires all JTAG interfaces to be powered. Other two-wire interfaces exist, such as Serial Wire Debug.
And there is another testpoint right next to it, which is probably the "other" JTAG pin (TMSC/TCK). That is even more highly awesome than mere "USB Downloader" mode, eh? Of course, that would be handy for a totally erased flash chip, or if they ever decide to disable serial port root/jailbreak/flash capability.

Last edited by geekmaster; 05-30-2016 at 04:55 PM.
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