[h1uke]

Originally Posted by eureka

bist is just a "codename" for "big", "full-featured" U-Boot, which cannot fit into OCRAM and should be loaded by first-stage, "small" U-Boot. (Read a bit more here and here).

Thank you for pointing me to that. I didn't have any plans even to touch the Touch,
so I was even specially avoiding reading anything related to it.

Originally Posted by eureka

With executing bist fastboot you're just saving fastboot argument for second-stage ("bist") U-Boot in memory and loading that second-stage U-Boot.

bist fastboot just boots the kernel. I'm not sure if this is the same kernel that boots on bootm, will check.
But bist alone looks more interesting. It brings the version of uboot having noticeably richer
command repertoire:

Spoiler:

U-Boot 2009.08-lab126 (Sep 06 2012 - 16:07:56)

CPU:   Freescale i.MX50 family 1.1V at 800 MHz
mx50 pll1: 800MHz
mx50 pll2: 400MHz
mx50 pll3: 216MHz
ipg clock     : 66666666Hz
ipg per clock : 66666666Hz
uart clock    : 24000000Hz
ahb clock     : 133333333Hz
axi_a clock   : 400000000Hz
axi_b clock   : 200000000Hz
weim_clock    : 100000000Hz
ddr clock     : 800000000Hz
esdhc1 clock  : 80000000Hz
esdhc2 clock  : 80000000Hz
esdhc3 clock  : 80000000Hz
esdhc4 clock  : 80000000Hz
MMC:  FSL_ESDHC: 0, FSL_ESDHC: 1
Board: Celeste WFO (256 MB)
Boot Reason: [POR]
Boot Device: MMC
Board Id: 00A15011241414IF
S/N: B024150224420FW8
DRAM:  256 MB
Using default environment

In:    serial
Out:   logbuff
Err:   logbuff
Quick Memory Test 0x70000000, 0xfffe000
POST done in 17 ms
Hit any key to stop autoboot:  0
uboot >
uboot > bist


U-Boot 2009.08-lab126 (Sep 06 2012 - 16:08:16)

CPU:   Freescale i.MX50 family 1.1V at 800 MHz
mx50 pll1: 800MHz
mx50 pll2: 400MHz
mx50 pll3: 216MHz
ipg clock     : 66666666Hz
ipg per clock : 66666666Hz
uart clock    : 24000000Hz
cspi clock    : 54000000Hz
ahb clock     : 133333333Hz
axi_a clock   : 400000000Hz
axi_b clock   : 200000000Hz
weim_clock    : 100000000Hz
ddr clock     : 266666666Hz
esdhc1 clock  : 80000000Hz
esdhc2 clock  : 80000000Hz
esdhc3 clock  : 80000000Hz
esdhc4 clock  : 80000000Hz
MMC:  FSL_ESDHC: 0, FSL_ESDHC: 1
Board: Celeste WFO (256 MB)
Boot Reason: [POR]
Boot Device: MMC
Board Id: 00A15011241414IF
S/N: B024150224420FW8
I2C:   ready
DRAM:  256 MB
Using default environment

In:    serial
Out:   serial
Err:   serial
POST done in 1 ms
Battery voltage: 4124 mV

bist > printenv
baudrate=115200
loadaddr=0x7A000000
testmem=mtest 0x70000000 0x7900000 0 1 2; mtest 0x7A000000 0x8FFFFFFF 0 1 2
bootcmd=bootm 0x41000
failbootcmd=panic
loglevel=5
bootcmd_diags=bootm 0xE41000
bootcmd_fastboot=fastboot
stdin=serial
stdout=serial
stderr=serial
post_hotkeys=0
bootdelay=-1
bootargs=

Environment size: 297/131068 bytes
bist > help
?       - alias for 'help'
autoscr - DEPRECATED - use "source" command instead
base    - print or set address offset
boot    - boot default, i.e., run 'bootcmd'
bootd   - boot default, i.e., run 'bootcmd'
bootm   - boot application image from memory
check   - perform MMC CRC32 check
cmp     - memory compare
coninfo - print console devices and information
cp      - memory copy
crc32   - checksum calculation
diag    - perform board diagnostics
echo    - echo args to console
fail    - fail blink fail pattern on LED
fastboot- Fastboot
go      - start application at address 'addr'
halt    - halt board
help    - print online help
i2c     - I2C sub-system
idme    - idme    - Set nv ram variables

iminfo  - print header information for application image
itest   - return true/false on integer compare
loadb   - load binary file over serial line (kermit mode)
loads   - load S-Record file over serial line
loady   - load binary file over serial line (ymodem mode)
loop    - infinite loop on address range
loopw   - infinite write loop on address range
md      - memory display
mm      - memory modify (auto-incrementing address)
mmc     - MMC sub system
mmcinfo - mmcinfo <dev num>-- display MMC info
mtest   - simple RAM read/write test
mw      - memory write (fill)
nm      - memory modify (constant address)
ocotp   - OCOTP sub system
panic   - panic halt
pass    - pass blink pass pattern on LED
pmic    - pmic    - PMIC utility commands

printenv- print environment variables
reset   - Perform RESET of the CPU
run     - run commands in an environment variable
setenv  - set environment variables
sleep   - delay execution for some time
source  - run script from memory
sspi    - SPI utility commands
version - print monitor version
bist >

this certainly requires more thinking..

Update:

I confirm that typing bist fastboot to a uboot prompt causes the
PW to enter the USB Recovery mode:

Spoiler:

uboot > bist fastboot


U-Boot 2009.08-lab126 (Sep 06 2012 - 16:08:16)

CPU:   Freescale i.MX50 family 1.1V at 800 MHz
mx50 pll1: 800MHz
mx50 pll2: 400MHz
mx50 pll3: 216MHz
ipg clock     : 66666666Hz
ipg per clock : 66666666Hz
uart clock    : 24000000Hz
cspi clock    : 54000000Hz
ahb clock     : 133333333Hz
axi_a clock   : 400000000Hz
axi_b clock   : 200000000Hz
weim_clock    : 100000000Hz
ddr clock     : 266666666Hz
esdhc1 clock  : 80000000Hz
esdhc2 clock  : 80000000Hz
esdhc3 clock  : 80000000Hz
esdhc4 clock  : 80000000Hz
MMC:  FSL_ESDHC: 0, FSL_ESDHC: 1
Board: Celeste WFO (256 MB)
Boot Reason: [POR]
Boot Device: MMC
Board Id: 00A15011241414IF
S/N: B024150224420FW8
I2C:   ready
DRAM:  256 MB
Using default environment

In:    serial
Out:   serial
Err:   serial
POST done in 1 ms
Battery voltage: 4058 mV

running cmd: fastboot
Entering fastboot mode...
Battery voltage: 4058 mV
USB speed: HIGH
Connected to USB host!
Charger disconnect
USB speed: HIGH
Connected to USB host!
USB configured.

it exits back to a bist> prompt when the USB cable gets disconnected.