Quote:
Originally Posted by geekmaster
Does the ATK utility manage the watchdog timer? Can that method be used to recover this borked K3?
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It is hard coded in the "RAM kernel" and qlob is using the ATK-v1.70 "RAM kernel".
But there are some setup values poked into register locations, and I am not sure if some of those might not change the watchdog time period.
There is a pair of conditions mentioned in the documentation that might be in conflict - -
* The watchdog timer is described as if it is a clock cycle counter (not a time base period). Freescale does not say that, but the relationship between the timer period in seconds varies with the clock speed used by the various SoC chips and I am guessing it is a counter.
* For programming eMMC, the "RAM kernel" is using the bit-serial port **AND** setting the SoC clock speed to that of the eMMC clock speed to simplify synchronous transfers.
? ? A watchdog cycle counter that runs from a changing speed clock ? ?
Now how fragile can that be.
- - - -
One thing that can be tried right away - if qlob is willing ...
Load the **other** eMMC "RAM kernel" (I put both on his /Kloud).
Another thing, for which my drugged up mind is not up to at the moment - - -
Re-build the "RAM kernel" with modified watchdog settings if it is, indeed, hard coded in the code.
The "client" programs (RAM kernels) are cygwin, linux, build system. It should be possible to do that part of the build on Linux with the "bare metal" cross-compiler.
Maybe someone here with build experience can look into that - my mind is not up to it now.