Quote:
Originally Posted by hawhill
Oh, this is a great idea! Will need to dig a bit into the kernel/reference manual to see where SoC registers are mapped... However, it might be more complicated, the battery management might be external and connected via SPI or I2C or the likes...
|
I don't recall if iROM can start the SPI, I2C and/or the one-wire controllers.
It has been over a week since I read the documents, will have to re-read them.
But checking the battery charge level **before** starting up the eDDR2 ram would be nice.
(That is what some of the memory addresses being poked at do, start the eDDR2 ram in self-refresh mode.)
In case you missed it: an3996.pdf is the document to have on-hand.
- - - -
O.T:
I don't recall if I took your username/password off the webdav://kloud - I can put them back if you want. That protected kloud is gathering a lot of "limited-distribution" documents.