08-27-2012, 09:37 PM | #106 | |
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Oh, and take a look-see if that dump script was able to create any of the various files. You might have gotten at least part of something. |
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08-27-2012, 10:42 PM | #107 |
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A few quotes
Code:
#define MX35 4 #define MEM_BASE_ADDR 0x80000000 #define MEM_BOTTOM_ADDR 0x87FFFFFF /* watch dog registers */ #define WDOG_BASE_ADDR 0x53FDC000 #define WDOG_WCR (WDOG_BASE_ADDR) #define WDOG_WSR (WDOG_BASE_ADDR + 0x2) Code:
#define WD_TIMEOUT 0x20 static void inline watchdog_service(void) { if (*(volatile u16 *)0x53FDC000 & 0x04) { *(volatile u16 *)0x53FDC002 = 0x5555; *(volatile u16 *)0x53FDC002 = 0xAAAA; } } Code:
/*! * delay */ static void delay(void) { int i; for (i=0;i<300;i++) { } } Code:
/*! * Function to send data to host through channel * * @buf buf to send * @count send data size * * @return 0 */ u32 atk_channel_send(const u8 *buf, u32 count) { u32 size; u32 i; u32 to = WD_TIMEOUT; usb_buffer_descriptor_t buf_desc; usb_status_t status = USB_FAILURE; if (channel == CHAN_USB) { watchdog_service(); while (count) { size = count > BULK_BUFFER_SIZE ? BULK_BUFFER_SIZE : count; /* FIXME: if the buffer is messed by the USB, use static buffer arrary */ buf_desc.buffer = (u8 *)buf; buf_desc.size = size; buf_desc.bytes_transfered = 0; status = (usb_status_t )tl_send_data(&buf_desc); count -= size; buf += size; /* update buffer addr */ if (--to <= 0) { watchdog_service(); to = WD_TIMEOUT; } } } else { watchdog_service(); for (i = 0; i < count; i++) { delay(); /* put data to UART transmit fifo */ uart_putchar(buf[i]); /* wait for TF empty */ while (!(*(volatile u32 *)UART1_USR2_1 & 0x4000)) { if (--to <= 0) { watchdog_service(); to = WD_TIMEOUT; } } if (--to <= 0) { watchdog_service(); to = WD_TIMEOUT; } } } return 0; } It does begin to look like we will have to build our own. At least the license allows us to make derivatives and distribute them in object code form for use on "licensed i.MX devices". On the "up side" - all of the defines and most of the code to use the OTG port looks like it is in the ATK source code. Last edited by knc1; 08-27-2012 at 11:14 PM. |
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08-28-2012, 12:18 AM | #108 |
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That "delay loop" with no body would get optimized out. It should minimally do a sleep call, preferably timer based. Very amateur, even for "non-production" code.
However, I am very happy to have even "mostly working" code as a guide to get us started on this new path of development. Those signed compares such as <=0 are bad practice on u32 numbers. In the code shown above, serial I/O services the watchdog timer every character, but USB only services it every 32 packets. That seems awfully long, especially if not on a USB 2.0 port. I would try 8 packets instead, or perhaps even every packet just to be safe (especially if you are using a USB mass storage device on your host PC, which could suck a lot of shared USB bandwidth). Last edited by geekmaster; 08-28-2012 at 01:25 AM. |
08-28-2012, 03:20 AM | #109 |
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Sounds like good suggestions to me.
Plus, a USB transfer can "stall" or "delay", it can't be assumed it is a continuous stream. So in real life, outside of the Freescale lab, that routine may be even less reliable than you suggest. I didn't quote the "write" routine but it has the same problems. If this really has to be done, why not a bit of design change tossed in? Set aside a few words of iRAM for a "parameter area" of critical values like the counts and watchdog settings. Then those could be "poked" from the host to "tweak" the timing of things rather than re-building the RAM kernel. Just like GM was hoping that Freescale had done to begin with in an earlier post. Let me see now, how could that be made to work while the system was running ... There are two watchdog values and at least two counter values ... Set aside 8 u32 words; 4 + 3 "to be discovered" + 1 simple checksum. If the all 8 words sum to zero (or other known value) then the first 7 values are valid and the run-time copies can be updated. If they don't, then they have never been set or are in the process of being changed and the run-time copies are not modified. For the host, that means poking all eight values, the checksum value last. For the client (Kindle RAM kernel) that means summing 8 words and testing for 0. It should be able to do that even during a high speed transfer with the slowest of clocks. Thoughts on that any one? Has anyone read the SoC hardware manual? Does the SoC have another hardware counter/timer that we could use in place of that programmed delay loop? What I saw in that routine was I think what GM saw in it - - The watchdog is not testing for a "hung kindle side code" it is testing if the outside world can transfer xyz USB packets in time. And in real life, you just can't count on the outside world to behave. I am not all that certain about that watchdog service routine - - Why the test? Why the counter? The ARM is a load/store machine, it can't take all that much time to poke two memory register values **every pass**. We could get extra ambitious and see if we can fix the i.MX31 problem also. Just in case anyone ever discovers how to put a DX(G) in USB downloader mode. |
08-28-2012, 04:08 AM | #110 |
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@GM : I PM'd you the access details for the "my k3 is broke" kloud.
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08-28-2012, 05:03 AM | #111 |
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@qlob : Don't try to re-flow the solder just yet. This is certainly a firmware error.
Trivia: While reading the specs on a 3G card (same assembly method) I saw it was rated to withstand a one-time shock of 5,000Gs in any direction. ???? Oh, it was also listed as an automotive part - - Nice to know that your car can still call on-star with the details of where to send the mop & sponge clean-up crew after a 5,000G collision. |
08-28-2012, 08:48 AM | #112 | |
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This way everyone can be looking at the same code and reference materials. This source (1.71) handles the i.MX 25, 27, 31, 32, 35, 37, 51 and 53 (no mention of the 503 - but maybe it only needs a loader script). I plan to start by pulling the existing client code (device_program/*) out of that VC project build system and getting it to build like any other Linux glob of code. Last edited by knc1; 08-28-2012 at 09:00 AM. |
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08-28-2012, 08:53 AM | #113 |
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I just installed konquerer. Apparently the Freescale license lets us publicly distribute modified binaries, but not modified source code. So this private repo would be needed to honor the Freescale license requirements. Thanks for sharing with invited "team mates".
Last edited by geekmaster; 08-28-2012 at 09:13 AM. |
08-28-2012, 09:07 AM | #114 |
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I really can't help much, you're now officially a few steps ahead of me on this matter :-) I need the last two weeks of my vacation time badly so I can work on some of these issues....
qlob: [[The "wrong transfer length" errors are in most cases irrelevant. I just was a bit too lazy to make the error more verbose.]] Edit: sorry, that was a bit hasty. I misread -- of course, those errors would be irrelevant if they would indicate that the RAM kernel is running (receiving 8 bytes instead of 4 bytes), but the other way around it means that it is dropping out of the RAM kernel mode over and over again. But that's what the posts of knc1+geekmaster are about. The disappearing USB device is a bummer, though -- but I think knc1 and geekmaster are right on track here, the culprit might be the RAM kernel. I do agree, most of the code of ATK I looked at didn't really feel like production-grade code. On the other hand, a lot of existing production-grade code doesn't feel like such either :-) As a last short note, before I will be able to contribute something more important: I was in most cases using the RAM kernel from ATK 1.67. Not sure if it changed at all from there on, though. Last edited by hawhill; 08-28-2012 at 09:20 AM. |
08-28-2012, 09:14 AM | #115 |
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@Hawhill I don't expect to make any protocol changes, just do code clean-up of the "RAM kernel".
I will PM you the access details so you can stare at the same references we are looking at in your free time. Consulting opinions are welcome - this is one piece of code that needs to "be right". |
08-28-2012, 09:20 AM | #116 | |
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But there have been enough recent: "My K3 is broke" reports that I guess I can learn to live with that (since I have a K3 myself). |
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08-28-2012, 09:22 AM | #117 | |
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Quote:
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08-28-2012, 09:24 AM | #118 |
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A short addendum: In k3flasher, I do the "mDDR init limbo" - as a straight reimplementation of what ATK does. That said, I never looked into the SoC reference manual to actually look up _what_ they are doing there. It might be that the timing they use is specifically suited for Freescale's iMX development board, but needs to be just a tad bit different for a Kindle - so what we experience here is a RAM running a bit out of its specified timing (which might work or not). This is just poking with a stick in the dark, however.
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08-28-2012, 09:27 AM | #119 | |
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Thanks for the suggestion, we should be able to get the DDR settings out of the U-Boot source or out of the DDR rom. |
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08-28-2012, 10:00 AM | #120 | ||
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The freescale license agreement:
http://www.freescale.com/webapp/sps/..._TOOL_STD_1_67 This is of particular interest: Quote:
And of course, what knc1 mentioned: Quote:
But if you read the rest of the license agreement, it appears that we are free to publicly distribute the modified binary executable at no charge. At least that is how I see it. Last edited by geekmaster; 08-28-2012 at 10:12 AM. |
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